Memory model

Results: 703



#Item
611Semantics / Mind / Computational linguistics / Mental processes / Semantic memory / Memory / Semantic similarity / Latent semantic analysis / Episodic memory / Linguistics / Natural language processing / Science

Inferring Contextual Semantics from Text using a Model of Human Episodic Memory and Conceptual Knowledge Formation Shane T. Mueller, Ph.D. Cognitive Science Group Klein Associates Division, ARA Inc[removed]Commerce Center

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Source URL: www.obereed.net

Language: English - Date: 2008-12-01 10:53:30
612Cognitive science / Psychology / Semantic memory / Episodic memory / Storage / Encoding / Recognition memory / Priming / Mind / Memory / Mental processes

REM II: A Bayesian model of the organization of the semantic and episodic memory systems Shane T. Mueller & Richard M. Shiffrin Indiana University, Bloomington, Department of Psychological and Brain Sciences stmuelle@ind

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Source URL: www.obereed.net

Language: English - Date: 2008-12-01 10:48:34
613Cognitive science / Memory / Semantics / Natural language processing / Semantic memory / Lexical semantics / Episodic memory / Encoding / Document-term matrix / Mind / Mental processes / Linguistics

REM-II: A Model of the Developmental Co-Evolution of Episodic Memory and Semantic Knowledge Shane T. Mueller & Richard M. Shiffrin Indiana University, Bloomington, Department of Psychological and Brain Sciences stmuelle

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Source URL: www.obereed.net

Language: English - Date: 2008-12-01 10:50:01
614Computer memory / Central processing unit / Parallel computing / Threads / Memory barrier / Memory model / Data dependency / Register renaming / Microarchitecture / Computing / Computer architecture / Concurrent computing

Understanding POWER Multiprocessors Susmit Sarkar1 1 Peter Sewell1

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Source URL: www.cl.cam.ac.uk

Language: English - Date: 2011-10-26 17:19:12
615X86 architecture / Computer memory / X86-64 / X86 / Java Memory Model / Memory barrier / Spinlock / Low-level programming language / MOV / Computer architecture / Computing / Instruction set architectures

Relaxed memory models must be rigorous ˇ c´ık3 Susmit Sarkar2 Francesco Zappa Nardelli1 Peter Sewell2 Jaroslav Sevˇ Luc Maranget1 Mark Batty2 Jade Alglave1 1

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Source URL: www.cl.cam.ac.uk

Language: English - Date: 2009-07-13 08:43:45
616X86 architecture / X86 instructions / Machine code / Central processing unit / X86 / MOV / Memory ordering / Memory barrier / Assembly language / Computer architecture / Computing / Computer memory

A better x86 memory model: x86-TSO (extended version) Scott Owens Susmit Sarkar

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Source URL: www.cl.cam.ac.uk

Language: English - Date: 2009-03-25 12:38:18
617Compiler construction / Logic in computer science / Programming language implementation / Formal methods / Memory barrier / Java Memory Model / Memory model / Thread-local storage / Compiler optimization / Computing / Software engineering / Computer memory

A CompCertTSO: A Verified Compiler for Relaxed-Memory Concurrency ˇ C ˇ ´IK, Microsoft JAROSLAV SEV VIKTOR VAFEIADIS, MPI-SWS

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Source URL: www.cl.cam.ac.uk

Language: English - Date: 2013-05-16 11:01:24
618Knowledge / Perception / Neuropsychological assessment / Bayesian statistics / Neuroscience / Memory / Graphical model / ACT-R / Mathematical psychology / Mind / Mental processes / Psychology

Introduction Experiments Summary A Transformation Based Model of Letter String Identification

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Source URL: www.obereed.net

Language: English - Date: 2005-11-09 16:41:33
619X86 instructions / Computer memory / Machine code / X86 / MOV / NOP / Parallel computing / Advanced Micro Devices / Assembly language / Computer architecture / Computing / X86 architecture

A Better x86 Memory Model: x86-TSO Scott Owens Susmit Sarkar Peter Sewell

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Source URL: www.cl.cam.ac.uk

Language: English - Date: 2009-06-04 11:46:53
620X86 instructions / Computer memory / Machine code / Assembly languages / Spinlock / X86 assembly language / X86 / MOV / Memory barrier / Computer architecture / Computing / X86 architecture

Final version of CACM Research Highlights paper, May 17, 2010 x86-TSO: A Rigorous and Usable Programmer’s Model for x86 Multiprocessors Peter Sewell

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Source URL: www.cl.cam.ac.uk

Language: English - Date: 2010-05-17 05:29:00
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